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Appendix A: Programming the Flash Device
Nios II EDS Flash Programming Instructions
A–3
1
1
1
For boards with dual-die CFI flash devices, use --base=0x0A000000 and
--offset=0x00020000 . For more information, refer to the Board Revision History
appendix of the Transceiver Signal Integrity Development Kit, Stratix IV GT Edition
Reference Manual .
These steps result in a set of .flash files suitable for Board Update Portal writing to the
user flash memory. For more information, refer to “Board Update Portal” on page 5–1 .
If your own design uses additional software files such as files used by the runtime
program or image data, you must first convert the files to .flash format and
concatenate them into one your_sw.flash file before using the Board Update Portal to
upload them.
The Board Update Portal standard .flash format conventionally uses either
< filename > _hw.flash for hardware design files or < filename > _sw.flash for software
design files.
If you have a hardware .sof developed using the Quartus II application that operates
without a software design file, you should still use the Nios II EDS tool sof2flash to
convert the .sof to .flash file, as described earlier for the hardware files. When the
Board Update Portal is implemented in this case, only the yourfile_hw.flash file is
selected without the yourfile_sw.flash file.
You can program the .flash files using the Nios II EDS nios2-flash-programmer
instead of the Board Update Portal as described in the next section.
Nios II EDS Flash Programming Instructions
To program the .flash files or any compatible S-Record File ( .srec ) to the board using
nios2-flash-programmer , perform the following steps:
Firstly, configure the FPGA with a compatible .sof for flash-programming:
1. Move jumper J62 from LOAD FACTORY to LOAD USER (jump pins 1-2).
2. With the board powered up and the USB cable attached, as described in
“Configuring the FPGA Using Quartus II Programmer” on page 6–1 , start the
Quartus II Programmer.
3. Click Add File and select the following path:
< install dir > \kits\stratixIVGT_4s100g2_si\factory_recovery\s4gt100_si_bup.sof
4. Turn on the Program/Configure option for the added file.
5. Click Start to download the selected configuration file to FPGA. The FPGA is
configured when the progress bar reaches 100%, after which the user LEDs flash
repeatedly on and off indicating that the flash device is ready for programming.
Secondly, run the Nios II EDS nios2-flash-programmer :
1. On the Windows Start Menu, go to All Programs> altera> Nios II EDS> Nios II
Command Shell .
2. In the Nios II Command Shell, navigate to the < install
dir > \kits\stratixIVGT_4s100g2_si\factory_recovery directory and type the
following Nios II EDS command:
January 2012
Altera Corporation
Transceiver Signal Integrity Development Kit,
Stratix IV GT Edition User Guide
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